1. Field of the Invention
The present invention relates to a substrate fabrication method and a substrate.
2. Description of the Related Art
Recently, semiconductor devices tend to include semiconductor elements of which operating frequencies are higher. As a result, there is a stronger demand of stabilizing source voltages supplied to such semiconductor elements. For such a semiconductor device having semiconductor elements operating at high frequencies, a variety of substrate structures having embedded capacitor elements have been presented as disclosed in Japanese Laid-Open Patent Applications No. 2002-008942 and No. 2001-053218.
In an exemplary presented substrate structure, a capacitor element includes a capacitor part on a silicon substrate and a via terminal to pierce the silicon substrate.
FIG. 1A through 1D are diagrams to explain conventional steps of fabricating such a capacitor element.
A capacitor element 1 is fabricated by following fabrication steps as shown in FIGS. 1A through 1D. At the first step, concave parts 3, which are used to form via terminals, are formed on the front surface 2a of a thick silicon substrate 2 having a thickness t1, as illustrated in FIG. 1A. At the second step, an insulation film 9 is formed on the front surface 2a, and then Cu is plated on the insulation film 9. As a result, the interiors of the concave parts 3 are filled with Cu, resulting in conductive parts 4 as illustrated in FIG. 1B. In the third step, a capacitor part 5 is formed on the surface 2a of the thick silicon substrate 2, for example, through etching and anodization, as illustrated in FIG. 1C. In the fourth step, in order to expose the conductive parts 4, the silicon substrate 2 is grinded up to the line 15 from the rear surface 2b by using a grindstone (back-grinding). Such a fabricated capacitor element 1 includes a silicon substrate 10 and a via terminal 11 as illustrated in FIG. 1D.
As mentioned above, however, one surface of a substrate is back-grinded with a grindstone until the conductive parts 4 are exposed. As a result, Cu powder may arise from the Cu conductive parts 4 through the back-grinding, resulting in clogging the grindstone surface. Thus, there occurs a problem of complicating grindstone maintenance.
In addition, since such Cu powder scatters at a high speed in general, there is a risk that work environments for semiconductor device fabrication may be contaminated.